OK, JFET matching time. My other FETs are still on order, so I tested my current stock of 10 J201s.
First, I breadboarded the non-IC Greatly Improved JFET Matcher circuit:
I used a strip of masking tape on my work surface so I could write the measured values for each transistor as I proceeded. Since I used a breadboard jumper instead of a switch for the 2 measurements, I did Idss for all 10, adjusted the jumper then measured Vp for all 10.
Once I had all the measurements, I looked for pairs with close values for both measurements. I got lucky. Out of 10 FETs, I got 3 matched pairs. Two matches are very close, and the third is not quite as close but still useable. To avoid having to do all this again, I put each pair into a separate labeled bag and all the rest back in the unmatched bag.
A lot more information on this process, the circuit, and how to derive other values such as the gain and ideal source and drain resistor values, see this ROG article. But the short reason for matching JFETs is to use them in circuits that have fixed resistors to control the bias voltage to 2 FETS, or circuits that include just one trimmer that adjusts for both FETS. By using a matched pair, the single resistance value will give similar behaviours in both FETs. Unmatched FETS can be saved for circuits that use just one, or where the bias voltage is controlled separately for each FET.
The Phase 45 circuit I am building has a single bias trimmer for both JFETs, so a matched pair will give the best result.
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Originally Posted by samr
